The invention concerns a semiconductor memory modules having individual memory circuits with redundant memory areas. Devices are provided for replacement circuiting of faulty memory areas of the memory modules by the redundant memory areas. Specifically, an internal memory circuit volatile auxiliary memory or reconfiguration register is provided for receiving information required for the replacement circuiting. Also, an external memory module non-volatile auxiliary memory is provided for receiving information necessary for internal replacement circuiting of all memory circuits.
Memory systems on a semiconductor base are presently constructed with the use of integrated memory modules. Accordingly, for each memory module a number of memory circuits (for example 36) are combined on a plug-in circuit board or on an assembly unit to form the memory module which is easily exchangeable for testing or maintenance purposes. Depending upon the desired capacity of the total memory and the capacity of the memory modules, or respectively of the circuit boards, the total memory is comprised of a more or less large plurality of circuit boards or modules. In general, the memory is also equipped with a fault or error correction device.
A very serious problem in the manufacture of integrated memory circuits is the low yield of completely fault or error free memory circuits. One has thus sought possibilities of at least still being able to employ such partially functional memory circuits whose faults only relate to individual bit locations, or respectively only a few rows or columns. However, such techniques result in a decreased capacity of the total memory with respect to a capacity which is attainable with fault-free memory circuits or they may result in an overload of the fault correction device.
It has thus already been proposed to arrange on a circuit board a group of, for example 16 memory circuits which may be effected by faults, without redundant memory areas and which results in a fault or error free memory circuit. The additional memory circuit takes over the replacement of the faulty bit locations in the group of circuits. A programmable read-only memory is addressed by means of a circuit selection address and the column address and, corresponding to its programmed conversion or translation function, releases an address for the replacement or substitute module when the primary address designates a faulty bit location. The circuit selection decoder for the circuit group is then blocked.
The expense of the programmable read-only memory is very high. In the case of 16 memory circuits with in each case 16k bits, for example, it would have to incorporate for example 2048 addressable memory locations for possible replacement addresses, of which naturally only a few can be occupied. Besides this, the data interface of the memory board circuit can only be as wide as the data interface of the additional memory circuit.
It is known from U.S. Pat. No. 3,755,791 incorporated herein by reference, to provide on the memory chip next to a first larger memory area a second significantly smaller memory area. Since in the case of freedom from fault, the first memory area is only accessed and its capacity is defined as the capacity of the memory chip, or respectively the memory circuit, this area will be designated hereafter as the memory main area. Correspondingly, the second area is the redundant memory area or memory replacement area. Its task is, to the greatest extent possible, to replace defective memory cells or word or bit lines in the memory main area. For the replacement circuit in the case of the known arrangement, on the memory chip changeover, devices and a programmable read-only memory are present for the storage of the information required therefore.
In case of the insertion of a printed circuit board with memory circuits of this type, the width of the data interface from and to the PC board can encompass as a maximum just as many bits as memory circuits which are present.
A survey of further possibilities for the complete use of faulty memory circuits with redundancy is given in the literature selection "IEEE Journal of Solid-State Circuit". Vol. SC-13, No. 5, October 1978, pages 698-703, incorporated herein by reference. Among other things, observations are made in this article concerning different kinds of storage of the replacement circuit information. Cited as an example is "the storage" by means of performing an operation on the wiring on the semiconductor chip by means of laser beams during or after a first check or inspection of the chip. As a further example, the programmable read-only memory already mentioned is cited. Both kinds have the advantage that the stored information does not get lost when the operating voltage for the memory circuit or for the memory constructed of such circuits is disconnected. While the first method however is very unflexible and subsequently does not permit change, the preparation of a programmable read-only memory on the chip in general requires the use of a technology which deviates from the technology for the production of the customary arrangements on the chip.
These disadvantages can be avoided by means of a volatile auxiliary memory on the memory chip whose content in any case disappears when the operating voltage fails. In order to avoid again checking the entire memory following this for the recovery of the appropriate information, in the literature selection mentioned it is proposed to provide a read-only memory for the entire memory, for example a magnetic disc. If, however, in case of a need for maintenance, a printed circuit board must be exchanged, the read-only memory contains information which is not valid for the replacement printed circuit board. The memory must therefore be again checked out.